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_______________general description the max781 is a system-engineered power-supply con- troller for subnotebook computers, pdas, or similar bat- tery-powered equipment. it provides high-performance, step-down (buck), pulse-width modulated (pwm) control for generating +3.3v and constant-current battery charg- ing. dual pcmcia vpp outputs are powered by a regulat- ed flyback winding. five high-side gate drivers and a buffered analog multiplexer are also included. all func- tions are controlled by an spi/microwire compatible four-wire serial interface. the max781 generates +3.3v with high efficiency through synchronous rectification and pwm operation at heavy loads. it uses idle mode operation at light loads. only small external components are required because of the device? high switching frequency (300khz) and advanced current-mode pwm architecture that allows for output capacitance as low as 50? per ampere of load. the max781 is configured by 32 bits of serial data. these bits select the operating mode, set the switch-mode bat- tery charger current level, select one of eight analog multi- plexer channels, and turn on/off the five high-side gate drivers. a status byte read from the serial interface indi- cates if the battery has been removed, if the dc charging source has been connected, or if there is a fault condition on the +3.3v output. an interrupt output signals the cpu if a status signal changes. ____________________________features ? +3.3v step-down controller ? dual pcmcia 2.0 compatible vpp outputs (0v/3.3v/5v/12v) ? digitally adjustable switching current source for battery charging ? 5 high-side switch gate-driver outputs ? spi serial interface ? 300khz switching frequency ? oscillator sync input ? 2.5v ?.5% reference output ? 36-pin ssop package ________________________applications subnotebook computers pdas communicating computers handy-terminals ______________ordering information max781 pda/hand-held computer power controller ________________________________________________________________ maxim integrated products 1 max781 digitally adjustable switching current source load switches subsystems 5 4 high-side gate drivers +3.3v at 1a or more serial interface interrupt vppa vppb analog multiplexer output dcin (up to 18v) 5 to 8 nicd/nimh cells or 2 lion cells self refresh dram cpu pcmcia slot b pcmcia slot a adc ________________________________________________typical application diagram call toll free 1-800-998-8800 for free samples or literature. 19-0205; rev 0; 7/94 part max781cbx MAX781EBX -40? to +85? 0? to +70? temp. range pin-package 36 ssop 36 ssop spi is a trademark of motorola inc. microwire is a trademark of national semiconductor corp. idle mode is a trademark of maxim integrated porducts. pin configuration on last page. evaluation kit available
max781 pda/hand-held computer power controller 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (batt = 6v, power-on reset state, t a = t min to t max , unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. batt, vchg, vhi to agnd.........................................-0.3v, 20v vppa, vppb to agnd..................................................-0.3v, 20v fast, gd1, gd2, gd3, gd4, gd5 to agnd ..............-0.3v, 20v bst to agnd ...............................................................-0.3v, 30v bst to lx .......................................................................-0.3v, 7v dhi to lx .......................................................-0.3v, (bst + 0.3v) pgnd to agnd ........................................................-0.3v, +0.3v all other pins to agnd or pgnd ..................................-0.3v, 7v vppa, vppb current .........................................................100ma 5out current....................................................................100ma 3out current......................................................................40ma continuous power dissipation (t a = +70?) ssop (derate 11.76mw/? above +70?) ....................941mw operating temperature ranges max781cbx .........................................................0? to +70? MAX781EBX ......................................................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? low-power mode, s h d n = batt = 18v shutdown mode, s h d n = 0v sync = agnd or 5out sync = ref low-power mode, 5.5v < batt < 18v, 0ma < i 5out < 10ma operate or standby mode, 5.5v < batt < 18v, 0ma < i 5out < 25ma standby mode, s h d n = batt = 18v operate mode, s h d n = batt = 18v no load v 5out falling i source = -20? to 100? v 5out rising conditions na -100 100 sync leakage current v 3.8 sync input voltage high v 0.75 sync input voltage low ? 1 sync rise time (note 1) ns 200 sync fall time (note 1) ns 500 sync minimum pulse width (note1) khz 270 350 sync capture range (note 1) khz 170 230 260 internal oscillator frequency 270 300 340 na 50 uvlo input bias current v 4.10 4.35 4.50 internal undervoltage lockout threshold (measured at 5out, uvlo = agnd) 4.30 4.60 4.80 60 120 10 v 4.8 5.2 5out output voltage 4.8 5.2 ? 250 750 ma 12 batt quiescent supply current v 2.463 2.5 2.537 ref output voltage mv -20 20 ref load regulation units min typ max parameter v uvlo falling v uvlo rising %ref 90 96 uvlo threshold (measured at uvlo) 97 103 supply and reference internal oscillator
max781 pda/hand-held computer power controller _______________________________________________________________________________________ 3 electrical characteristics (continued) (batt = 6v, power-on reset state, t a = t min to t max , unless otherwise noted.) vhi = 14.2v, gdsel_ = 0, i sink = 20? standby mode, 4v < batt < 18v, 0ma < i 3out < 10ma vhi = 14.2v, gdsel_ = 1, i source = 1? operate mode, vhi = 18v, vppa1 = vppa0 = 0, vppb1 = vppb0 = 0, gdsel1 to gdsel5 = 0 low-power mode, 4v < batt < 18v, 0ma < i 3out < 1ma vhi = 20v temp falling high or low, bst - lx = 4.5v operate mode, i sink = 200?, vppa1 = vppa0 = 0, vppb1 = vppb0 = 0, gdsel1 to gdsel5 = 0 low, 5out = 4.75v high, 5out = 4.75v 3out falling conditions v 0.25 gd_ output low voltage v 14 gd_ output high voltage ? 45 vhi input bias current ma 1 vhi clamp current v 20 vhi clamp voltage 3.17 3.43 3.17 3.43 75 81 10 dhi on-resistance 10 dlo on-resistance 15 v 3out output voltage mv 80 100 130 cs to 3out current-limit threshold v 2.9 3.0 3.1 3vint fault-detect threshold mv 150 3vint fault-detect hysteresis units min typ max parameter 14.2v < vhi < 18v, vpp_1 = 1, vpp_0 = 1, 0ma < ivpp_ < 60ma 14.2v < vhi < 18v, vpp_1 = 1, vpp_0 = 0, 0ma < ivpp_ < 60ma 14.2v < vhi < 18v, vpp_1 = 0, vpp_0 = 1, 0ma < ivpp_ < 60ma i sink = 1ma, vpp_1 = 0, vpp_0 = 0 v 3.14 3.3 3.49 vpp_output voltage 11.4 12.0 12.6 4.75 5.0 5.25 0.25 gd_ = 2.5v, gdsel_ = 0, vhi = 14.2v gd_ = 2.5v, gdsel_ = 1, vhi = 14.2v ? 200 450 900 gd_ sink current ? 61018 gd_ source current temp rising %3out 83 89 battint battery-detect threshold (measured at temp) operate mode v 12.8 13.5 14.2 vhi regulation threshold operate mode, 4v < batt < 18v, cs to 3out = 0mv to 80mv 3.17 3.43 3.3v output vpp regulator high-side gate drivers
max781 pda/hand-held computer power controller 4 _______________________________________________________________________________________ electrical characteristics (continued) (batt = 6v, power-on reset state, t a = t min to t max , unless otherwise noted.) chg6 to chg0 = 1, charge = 1 mux2 = 0, mux1 = 0, mux0 = 1 high or low, 5out = 4.75v mux2 = 0, mux1 = 0, mux0 = 0 i sink = 1.6ma i source = 1ma i sink = 10? mux2 = 1, mux1 = 1, mux0 = 1 mux2 = 1, mux1 = 1, mux0 = 0 mux2 = 0, mux1 = 1, mux0 = 0 mux2 = 0, mux1 = 1, mux0 = 1 mux2 = 1, mux1 = 0, mux0 = 0 mux2 = 1, mux1 = 0, mux0 = 1 conditions ?ho 400 600 750 current-sense amplifier csbat to comp transconductance (gm) mv 190 200 210 csbat full-scale current-sense voltage 10 dchg on resistance ns 50 ce, sclk, din logic input rise/fall time (note 1) v 0.4 dout, int logic output low voltage v 2.7 dout, int logic output high voltage k 60 100 140 ce internal pull-down resistance na -100 100 sclk, din leakage current v 2 ce, sclk, din logic input high voltage %5out 44.54 45.45 46.36 %3out 65.33 66.67 68.00 mv 10 aout output low %auxin 65.33 66.67 68.00 aout output voltage %vref 99.8 100 100.2 %batt 19.90 20.00 20.10 %temp 65.33 66.67 68.00 %vppa 18.49 18.87 19.25 %vppb 18.49 18.87 19.25 units min typ max parameter fast = 18v, faston = 0 fast = 3v, faston = 1 na ?.0 output sink current ma 1.0 2.0 v 0.8 ce, sclk, din logic input low voltage csbat = 0v mv -2 0 2 comp current-sense amplifier offset voltage analog multiplexer serial interface battery charger fast output
max781 pda/hand-held computer power controller _______________________________________________________________________________________ 5 timing characteristics (note 1) note 1: guaranteed by design. parameter min typ max units ce assertion to dout enable 120 ns sclk low pulse width 125 ns sclk high pulse width 125 ns sclk clock period 400 ns ce deassertion to dout disable 120 ns din to sclk data hold time din to sclk data setup time 125 ns 0 ns sclk to dout valid propagation delay 30 200 ns symbol t dv t cl t ch t cp t tr t ds t dh t do sclk rising edge to ce deassertion 200 ns ce assertion to sclk rising-edge setup time 200 ns ce high pulse width 300 ns sclk rising edge to ce assertion 200 ns t csh t css t csw t cs0 ce deassertion to sclk rising edge 200 ns t cs1 __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.) 10 1 0.1 0.01 0.001 2 4 6 8 10 12 14 16 18 no load supply current max781-01 batt input voltage (v) quiescent current (ma) (i 3out =0ma) sync=uvlo=agnd, charge=0 gdsel_=0 mux_=0 5on=1 vpp_=0 shutdown mode low-power mode standby mode operate mode (idle = 1) operate mode (idle = 0) 10 1 charger output current max781-03 charger code (chg6?hg0 value) current into batt (ma) 100 1000 efficiency (%) 10 20 30 40 50 60 70 80 90 100 3 7 15 31 127 63 ma % r4 = 0.2 w sync = agnd batt = 7v to 8v vchg = 12v
max781 pda/hand-held computer power controller 6 _______________________________________________________________________________________ ____________________________typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) 4 vppa and vppb output power vppa shorted to vppb and clamped to 11.5v max781-02 batt voltage (v) current (ma) vhi voltage (v) 6 8 10 12 14 16 18 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 50 100 150 200 250 300 350 400 configuration = $ff, $00, $02, $6a, sync = agnd, no 3out load t1 turns ratio (secondary turns / primary turns) = 3.5 vhi voltage batt input current vppa + vppb current 10 0 dchg duty cycle vs. comp voltage max781-04 comp voltage (v) dchg duty cycle (%) 20 30 40 50 60 70 80 90 0 0.5 1.0 1.5 2.0 2.5 3.0 at 0% duty cycle, dchg = 5out 10 1 10 100 1000 3out operate mode power efficiency (fixed 300khz switching frequency) max781-05 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 5.5v sync = ref idle = 0 mode1 = 1 mode0 = 0 10 1 10 100 1000 3out operate mode power efficiency (fixed 230khz switching frequency) max781-06 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 5.5v sync = agnd idle = 0 mode1 = 1 mode0 = 0 10 1 10 100 1000 3out operate mode power efficiency (fixed 300khz switching frequency) max781-08 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 7.5v sync = ref idle = 0 mode1 = 1 mode0 = 0 10 1 10 100 1000 3out operate mode power efficiency (variable switching frequency) max781-12 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 5.5v sync = ref idle = 1 mode1 = 1 mode0 = 0 0 50 100 150 200 250 300 350 400 450 switching frequency (khz) % khz 10 1 10 100 1000 3out operate mode power efficiency (variable switching frequency) max781-10 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 5.5v sync = agnd idle = 1 mode1 = 1 mode0 = 0 0 50 100 150 200 250 300 350 400 450 switching frequency (khz) % khz 10 1 10 100 1000 3out operate mode power efficiency (fixed 230khz switching frequency) max781-07 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 7.5v sync = agnd idle = 0 mode1 = 1 mode0 = 0 10 1 10 100 1000 3out operate mode power efficiency (variable switching frequency) max781-11 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 7.5v sync = ref idle = 1 mode1 = 1 mode0 = 0 0 50 100 150 200 250 300 350 400 450 switching frequency (khz) % khz
max781 pda/hand-held computer power controller _______________________________________________________________________________________ 7 10 1 10 100 1000 3out operate mode power efficiency variable switching frequency max781-09 3out output current (ma) power efficiency (%) 20 30 40 50 60 70 80 90 100 batt = 7.5v sync = agnd idle = 1 mode1 = 1 mode0 = 0 0 50 100 150 200 250 300 350 400 450 switching efficiency (khz) % khz 0 0 using the battery charger to drive a ccfl backlight royer oscillator max781-01 chg6?hg0 bits value ccfl tube current (ma, rms) csbat average voltage (mv) 10 20 mv 30 40 50 60 70 80 90 100 110 10 20 30 40 50 60 70 0.5 1.0 1.5 2.0 2.5 sync = ref vchg = 7v batt = vchg - diode drop r4 = 0.47 w ma, rms ____________________________typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) ______________________________________________________________pin description 21 dlo +3.3v regulator, synchronous rectifier, gate-driver output 22 bst +3.3v regulator boost capacitor connection (0.1? to lx) 23 dhi +3.3v regulator high-side gate-driver output 24 lx +3.3v regulator inductor connection 20 pgnd power ground 12 dout serial-interface data output 13 din serial-interface data input 16 comp battery-charger compensation name function 1? gd2?d5 high-side gate-driver outputs 5 vppa vpp-programming voltage output a pin 17 csbat battery-charger current-sense input 18 5out linear-regulated +5v output 19 dchg battery-charger mosfet gate-driver output 14 int interrupt output 15 fast general-purpose open-drain output 8 agnd analog ground 9 sync oscillator frequency control and synchronization input 10 ce serial-interface chip-enable input?ctive high 11 sclk serial-interface clock input 6 vhi vppa, vppb linear-regulator input power 7 vppb vpp-programming voltage output b
max781 pda/hand-held computer power controller 8 _______________________________________________________________________________________ _________________________________________________pin description (continued) 33 temp analog multiplexer input and battery sense input 34 auxin analog multiplexer input 25 3out +3.3v regulator feedback connection and linear-regulated + 3.3v output 26 cs +3.3v regulator current-sense input 35 s h d n shutdown-mode control input 36 gd1 high-side gate-driver output 29 vchg charger voltage input 30 uvlo undervoltage lockout threshold input 31 ref +2.5v reference output 32 aout analog multiplexer buffered output 27 ss +3.3v regulator soft-start capacitor connection 28 batt battery voltage input max781 c7 m1 m2 t1 c12 c11 +5v low current output +14v output +3.3v output pcmcia 2.0 card slot vpps d7 d6 d5 c6 c9 c8 gate drivers for power switching r7 5out vhi batt dhi bst lx dlo pgnd cs 3out agnd vppa spi compatible serial interface vppb gd1 uvlo ss gd5 aout auxin fast int dout din sclk ce csbat comp temp sync ref dchg r4 r8 d2 battery charger section m3 l1 d3 c14 d1 battery charger dc input r1 c1 c3 c2 c5 c10 t vchg shdn figure 1. typical operating circuit
vpp linear regulators bias gen +3.3v linear regulator vchg batt uvlo shdn agnd ce sclk din auxin aout temp 2.5v reference +3.3v switching regulator serial interface avpp1 idle mode0 mode1 50n avpp0 bvpp0 bvpp1 battstat mux_ muxon gdsel_ gdon chg_ chgon bst ss cs3 3out ref dhi lx dlo pgnd sync vhi vppa vppb int dout fast dchg comp csbat inreg chgstat undervoltage 3vstat +5v linear regulator gate drivers 5 5 37 battery charger analog multiplexer max781 pda/hand-held computer power controller _______________________________________________________________________________________ 9 figure 2. max781 block diagram
max781 pda/hand-held computer power controller 10 ______________________________________________________________________________________ _______________detailed description modes of operation table 1 describes the max781? four modes of opera- tion, and table 2 shows how to select the desired mode. mode1 and mode0 are the two bits, out of a total of 32 bits of configuration data, which select the operational mode. see table 3 for a complete list of the 32 bits of configuration data. with s h d n pulled up to the battery voltage, the max781 powers on in low-power mode. after power- up, pulling ce high temporaily places the max781 into operate mode and allows data to be shifted into the internal shift register. as soon as ce goes low, the max781 enters the mode programmed by the mode1 and mode0 bits. serial interface the max781 is controlled by 32 bits of configuration data. these 32 bits must be written, msb first, into the max781 using a synchronous serial interface. table 3 describes the function of each bit of configuration data. to turn the gate drivers on/off, select vpp voltages or program the analog multiplexer. ce, sclk, din, and dout are the synchronous serial-interface pins. figure 3 shows an example of the signal timing necessary to send 32 bits of data to the max781. the first six bits clocked out of dout are the status bits, and the remaining 26 bits clocked out of dout should be ignored. figure 4 shows the detailed timing require- ments of the synchronous serial interface. to write the last eight bits of the configuration data without affecting the rest of the configuration bits, clock eight bits instead of 32 into din. this allows the charge, idle, mode1, mode0, and vpp control bits to be updated in only eight serial clock cycles. as the eight bits are clocked into din, the status bits are clocked out of dout. figure 5 shows an example of such a quick access. if eight zeros are sent in a quick access, no configuration data is updated. this allows the status bits to be read quickly without affecting the last byte of configuration data. status bits as the 32 bits of serial-configuration data are written into the max781, 32 bits of data are read out of dout. the first six bits contain status information, and the remaining 26 bits should be ignored. battint and battstat (table 3) indicate battery sta- tus. it is assumed that the battery pack used with the max781 has a thermistor attached to its negative termi- mode1 mode0 0 x x 1 1 1 s h d n 1 0 1 1 1 0 1 0 0 1 0 1 ce x 1 1 x x 0 resulting mode shutdown operate standby operate standby low power 1 1 1 0 low power (default on power-up) table 1. max781 modes of operation table 2. operating modes buck switching regulator on 3out regulated to +3.3v vpp outputs enabled vhi regulated to +14v analog multiplexer enabled high-side gate drivers enabled battery-charging current source enabled operate default on power-up 3out supplies 10ma at +3.3v linear regulated from batt vpp outputs off (vppa = vppb = high-z) analog multiplexer off (aout = high-z) high-side gate drivers off (gd1 = gd2 = gd3 = gd4 = gd5 = 0v) battery-charging current source off (dchg = 5out) standby 3out supplies 10ma at +3.3v linear regulated from batt vpp outputs off (vppa = vppb = high-z) analog multiplexer enabled high-side gate drivers off battery-charging current source enabled low power entire chip shut down all blocks turned off i q < 10? 3out, 5out, ref off shutdown mode description
max781 pda/hand-held computer power controller ______________________________________________________________________________________ 11 nal, causing the battery pack to need at least three ter- minals: batt+, batt,- and therm. the max781? temp pin connects to the battery pack? thermistor (figure 6). without the battery pack installed, r8 pulls the max781? temp pin up to 3out, and battstat = 1. when the battery pack is inserted, the resistive divider formed by the thermistor and r8 pulls the temp pin below 3out, forcing battstat = 0. any transition of battstat sets battint. clear battint by writting a logic 1 in bit 31 of the serial-configuration data. the battstat comparator is disabled in low-power and shutdown modes, and outputs a logic zero regardless of the state of its inputs. 3vint and 3vstat indicate the status of the 3out output (+3.3v ?%). 3out is out of regulation when its output voltage falls below +3.1v. 3vstat = 0 when 3out is in regulation, and 3vstat = 1 when 3out is out of regulation. a rising edge on 3vstat sets 3vint; thus, 3out going out of regulation sets 3vint. table 3. configuration data-bit assignments mode0 vppb1 vppb0 vppa1 vppa0 charge idle mode1 1 0 0 0 0 1 1 1 operating mode select bit, 0, see table 2 w 4 vppb voltage select bit 1, see table 5 w 3 vppb voltage select bit 0, see table 5 w 2 vppa voltage select bit 1, see table 5 w 1 vppa voltage select bit 0, see table 5 w 0 1 = dchg switching current source on, 0 = off w 7 1 = idle regulation, 0 = pwm regulation w 6 operating mode select bit, 1, see table 2 w 5 chg2 chg1 chg0 50n faston chg6 chg5 chg4 chg3 mux0 mux1 0 1 0 1 0 0 0 0 0 0 1 charger current setting dac bit 2 w 12 charger current setting dac bit 1 w 11 charger current setting dac bit 0 w 10 1 = 5out linear regulator on, 0 = off w 9 1 = fast sinks current, 0 = fast open drain w 8 charger current setting dac bit 6 w 16 charger current setting dac bit 5 w 15 charger current setting dac bit 4 w 14 charger current setting dac bit 3 w 13 analog multiplexer bit 0 w 17 analog multiplexer bit 1 w 18 gdsel4 gdsel3 gdsel2 gdsel1 mux2 chgint chgstat gdsel5 3vstat 3vint battstat battint name 0 0 0 1 0 0 0 0 0 0 0 0 * 1 = gd4 sources from vhi, 0 = gd4 sinks to agnd w 23 1 = gd3 sources from vhi, 0 = gd3 sinks to agnd w 22 1 = gd2 sources from vhi, 0 = gd2 sinks to agnd w 21 1 = gd1 sources from vhi, 0 = gd1 sinks to agnd w 20 analog multiplexer bit 2 w 19 1 = vchg > batt detected r/w 27 1 = vchg > batt, 0 = vchg < batt r 26 unused 25 1 = gd5 sources from vhi, 0 = gd5 sinks to agnd w 24 1 = 3out out of regulation, 0 = in regulation r 28 1 = 3out fault detected r/w 29 bit 1 = temp > 0.82*3out, 0 = temp < 0.82*3out r 30 1 = temp pin voltage crossed 0.82* 3out r/w 31 description r/w * = power-on reset default state
max781 pda/hand-held computer power controller 12 ______________________________________________________________________________________ ce output from cpu input to max781 sclk time output from cpu input to max781 data clocked into max781 on rising edge of sclk data clocked out of max781 on falling edge of sclk din output from cpu input to max781 battstat battint 3vint battint 3vint vppa1 vppa0 xxx xxx xxx dout input to cpu output from max781 ce sclk din dout t cso t css t ch t csh t csw t cs1 t tr t cp t dh t cl t do t dv t ds ? ? ? ? ? ? ? ? ce sclk time din battstat 3vstat chgint chgstat battint 3vint charge mode1 mode0 idle vppa1 vppb0 vppb1 vppa0 xxx xxx xxx dout figure 3. serial configuration data example timing figure 4. detailed timing diagram figure 5. quick-access example timing
max781 pda/hand-held computer power controller ______________________________________________________________________________________ 13 the 3vstat comparator is disabled in the low-power, standby, and shutdown modes, and outputs a logic zero regardless of the state of its inputs. the max781 serial-interface outputs are powered from 3out. if 3out is short circuited to ground, then neither dout nor int will be able to source current. chgint and chgstat indicate the status of the charging voltage applied to vchg. the max781 pow- ers itself from either batt or vchg, whichever has the higher voltage. chgstat = 0 when batt is approxi- mately 200mv greater than vchg. chgstat = 1 when batt falls below vchg plus approximately 200mv. any transition on chgstat sets chgint. the chgstat comparator is disabled only in shut- down mode. at power-up, battint is set if the charger is not con- nected, chgint is set if the charger is connected. the int pin outputs the logical or of the battint, 3vint, and chgint status bits. the int pin generates an interrupt on the cpu that controls the max781. supply and reference 5out outputs +5v, linear regulated from either batt or vchg, in all modes except shutdown. 5out can source up to 25ma. power comes from batt as long as the batt voltage is greater than the vchg voltage. when the vchg voltage exceeds batt, vchg sup- plies the 5out linear regulator. the max781? internal circuitry is powered from 5out. when the dlo pin drives high, it sources current from 5out. the dout and int pin output drivers are pow- ered from 3out. if an external 5v supply is available and connected to the 5out pin, the 5out linear regu- lator can be disabled by clearing the 5on bit. if 5on is cleared without an external +5v supply connected to 5out, or if 5out is shorted to ground, the max781 internal registers will be cleared to their power-on state. 3.3v output 3out outputs +3.3v in all modes except for shutdown. in low-power and standby modes, 3out is linear regu- lated from either batt or vchg, whichever has the higher voltage. in operate mode, the switch-mode buck (step-down) converter is activated to regulate 3out to 3.3v. in operate mode, the 3out linear regu- lator is off. table 4. status detection in the four operating modes clr writing a "1" to battint clears the flip flop comparator disabled in low-power mode; outputs "0" regardless of state of inputs d battint battstat 402k 14.1k batt 3out batt+ battery pack therm batt- r4 1 m f temp agnd, pgnd 83k r8 r temp to analog multiplexer > > q max781 t figure 6. battint, battstat status circuitry battstat disabled disabled 3vstat disabled disabled chgstat disabled enabled enabled enabled enabled enabled enabled enabled status bit shutdown low power standby operate mode
max781 pda/hand-held computer power controller 14 ______________________________________________________________________________________ dhi high-side drives an external n-channel power mosfet, m1. inside the max781, the dhi driver is well-isolated so it can be powered separately from the rest of the chip. the dhi driver is powered by current that flows into bst and out of lx. thus, bst is the ?ower?connection and lx is the ?round?connection for the dhi driver. an internal level shifter allows the max781 internal circuitry to communicate with the dhi driver. r sense , connected from cs to 3out, senses current in the primary of transformer t1. with no load on vhi, the primary of t1 can be treated as the inductor in a cur- rent-mode buck converter. r sense detects current in the primary and turns off m1 when the current limit is reached. the current limit is adjusted to ensure that 3out stays at 3.3v. with m1 off, m2 stays on until the voltage on r sense reaches zero. there is an absolute current limit that protects the output in the event 3out is short circuited to ground. when the voltage from 3out to cs reaches 100mv, m1 is turned off whether or not 3out is in regulation. a capacitor (c5) on the soft-start (ss) pin allows the current limit to slowly ramp up when power is first applied. a 4? current source from 3out feeds the ss pin. the ramp time to full current limit is approximately 1ms for every nanofarad of capacitance on ss, with a minimum value of 10ns. once the ss pin reaches 3.3v, the maximum peak current is available. uvlo prevents the buck regulator and battery charger from switching if 5out is out of regulation. the voltage on uvlo is compared to ref. if uvlo is greater than ref, the buck regulator and battery charger will func- tion normally. with uvlo less than ref, the buck regu- lator and battery charger stay off and the low-power mode linear regulator supplies 3out, whether or not operate mode has been set. tying uvlo to agnd allows an internal resistive divider to feed the uvlo com- parator, preventing operation of the buck regulator and battery charger for 5out voltages less than approximately 4.35v (see the electrical characteristics ). the max781 3.3v buck regulator is similar to the 3.3v buck regulator on the max783. for further information, refer to the max783 data sheet idle regulation vs. pwm regulation in operate mode, 3out can be regulated using pulse- skipping (idle-mode regulation) or pulse-width-modu- lation (pwm) regulation. the idle bit selects the regulation scheme used for load current below about 25% of current limit. idle-mode regulation pulses m1 until 25% of the absolute current limit is reached, at which point m1 turns off. m1 does not turn on again until 3out falls below 3.3v. this scheme improves light-load efficiency by minimizing the number of times m1 needs to be turned on to keep 3out in regulation. however, the operating frequency varies with load. at load currents above 25% of current limit, the regulator uses resonant frequency pwm regulation independent of the idle bit. pwm regulation turns m1 on at a constant frequency and modulates m1? duty cycle to maintain the current required to keep 3out in regulation. the switching fre- quency remains constant regardless of the load cur- rent. operating with a constant frequency results in lower amplitude and more easily filtered output ripple. the sync pin either sets the internal switching fre- quency or synchronizes the max781 to an external oscillator. tying sync to ref sets a switching fre- quency of 300khz. tying sync to 5v or agnd sets a 230khz switching frequency. driving sync with an external oscillator synchronizes the pwm switching with the external oscillator. vpp regulator vppa and vppb linear regulate vhi down to 0v/+3.3v/+5v/+12v for use as a pcmcia vpp voltage. the vppb0, vppb1, vppa0, vppa1 bits control the vppb and vppa output voltage. programming vppa or vppb to 0v shuts off the linear regulator and saves qui- escient supply current. table 5 shows how to program the vppa and vppb control bits. during the flyback phase of the buck converter (dlo on), vhi loads 3out. as long as dlo is on, power can be supplied to vhi. when 3out has a light load, dlo may not stay on long enough to supply power to vhi. to prevent vhi from sagging, an internal comparator checks vhi. if vhi sags below 12.8v, dlo is turned on for 1? to provide power to vhi, regardless of the volt- age on rsense. power can only be delivered to vhi in operate mode when the buck switching regulator is active. the vhi pin includes an overvoltage clamp that sinks current if vhi exceeds 19v. this prevents the parasitic capacitance in transformer t1 from causing the vhi voltage to climb without limit. idle-mode is a trademark of maxim integrated products.
max781 pda/hand-held computer power controller ______________________________________________________________________________________ 15 gate drivers gd1 through gd5 are gate-driver outputs that high- side drive external n-channel power mosfets. loads connected to 3out can be connected or disconnected by using the circuitry shown in figure 7. clearing gdsel1 (gdsel1 = 0) causes gd1 to sink up to 450? to agnd. setting gdsel1 (gdsel = 1) causes gd1 to source up to 10? from vhi. gd2?d5 oper- ate the same way. vhi is active (i.e., regulated to at least 12.8v) only in operate mode, so the gate drivers also only function in operate mode. gdsel1 defaults to a 1 on power-up. gdsel2 through gdsel5 default to 0 on power-up. fast is a general-purpose output pin that sinks current when faston = 1 and goes open drain when faston = 0. fast can be pulled up to any voltage up to 19v. to use fast as a general-purpose 3.3v logic output, pull it up to 3out with a 100k resistor. fast may be used to pull the gate of m3 down to connect the battery to the input supply. the max781 does not limit the bat- tery current when fast is used in this way. battery charger the battery charger is a voltage-mode average current regulator. figure 8 shows a functional diagram of the battery charger circuitry. the gmamp is a transcon- ductance amplifer with approximately 62db of open- loop dc gain. set the gmamp bandwidth with the capacitor on comp. gmamp bandwidth in hertz = gm / c where gm = 0.0006 mho (mho = 1/ ) and c = capaci- tance on comp in farads. average the current-sense signal by setting the gmamp bandwidth much lower than the battery-charg- er switching frequency. the voltage output of the gmamp at comp is converted to a duty cycle, which is driven out of dchg. serial-configuration bits chg6?hg0 set the average current level. when chg6?hg0 are all set (1111111), csbat is regulated to an average of 200mv. when chg6?hg0 equals binary 0111111, csbat is regulat- ed to an average of 100mv. analog multiplexer the max781? built-in buffered analog multiplexer selects one of eight different signal sources to be out- put from the aout pin. figure 9 shows the analog mul- tiplexer circuitry. the aout buffer amplifier is disabled in the shutdown and low-power modes, leaving the 89.7k resistor to pull aout down to ground. program the mux0, mux1, mux2 bits in the serial-configuration data to select the analog multiplexer channel (table 6). resistive dividers in the signal paths scale the chan- nels to ensure that aout is scaled to ref. the aout buffer amplifier can sink or source 1ma. vppa0 1 0 0 0 0 1 0 vppa1 1 1 0 1 1 0 0 vppb1 vppb0 vppa voltage (v) 0 12 5 5 12 3.3 0 vppb voltage (v) 1 1 3.3 table 5. vppa and vppb control bits max781 3.3v load that needs to be turned on/off gd_ 3out n-channel power mosfet ...to rest of 3out circuit ...to rest of agnd connections agnd figure 7. using the gate drivers for high-side load switching gmamp dchg dchg = 5out external switch off dchg = agnd external switch on 5out at 0% duty cycle , dchg = 5out pgnd comp voltage to duty cycle converter 7-bit dac chg6?hg0 csbat dacout (0mv to 200mv) figure 8. battery-charger block diagram
max781 _component selection and layout 3.3v output input and output bypass capacitors capacitor c15 ensures that the buck regulator has a low ac-impedance power source. c15? root mean square ripple-current rating must be greater than 0.5 x (maximum power output capability of the system) / 3.3v. capacitor c6 keeps 3out output ripple low and stabilizes the regulation loop. c15 and c6 must have low equivalent series resistance (esr), preferably with less than 0.2 of esr at 200khz. tantalum capacitors typically have the lowest esr. c15? ground connec- tion must be as close as possible to c6? ground con- nection; ideally, the two capacitors will be grounded at the same point. the max781? agnd pin should only connect to system ground at the ground connection of c15 and c6. if the pc board has a ground plane, a separate trace should directly connect agnd to the ground connections of c15 and c6. likewise, the batt pin should only connect to the battery at c15? positive terminal. the capacitance and esr of c6 determine loop stabili- ty. to ensure loop stability, the minimum capacitance and maximum esr values are: c6 > 2.5v / (3.3v x r7 x 2 x p x gbwp) with c6 specified in farads, r7 specified in ohms, gbwp = gain bandwidth product of 60,000hz, and: c6 esr < (3.3v x r7) / 2.5v with c6 esr specified in ohms, and r7 specified in ohms. in order to achieve the required low esr, it may be appropriate to select a value greater than the minimum for c6, or to construct a composite c6 by paralleling several smaller capacitors. current-sense resistor current-sense resistor r7 sets the maximum peak cur- rent through power switch m1 and the primary of trans- former t1. the max781? maximum peak current limit is 120mv / r, where r is the minimum possible resis- tance for r7, and 120mv is the maximum electrical specification for the current-limit threshold. for exam- ple, selecting a 0.082 ?% resistor for r7 yields a maximum peak current limit of 120mv / 0.082 x 0.99 = 1.478a. the maximum peak current limit must be less than or equal to the maximum allowed continuous dc current through either m1 or the primary of t1. r7 also determines how much power 3out, vppa, and vppb can deliver. the current-limit threshold can be as small as 80mv and, using a 0.082 ?% resistor, pda/hand-held computer power controller 16 ______________________________________________________________________________________ 1 0 0 1 1 0 0 1 mux0 temp/1.5 batt/5 vppb/5.3 ref auxin/1.5 aout outputs 1 0 1 0 vppa/5.3 0 1 0 1 5out/2.2 3out/1.5 0 mux2 0 1 1 0 1 1 0 mux1 table 6. analog multiplexer channel selection 500k 498.4k 116k 116k 125k 359k 183.3k 89.7k 300k 498.4k 200k 150k auxin ref vppb vppa temp batt 5out aout 3out mux0 mux1 mux2 3-to-8 decoder y7 y6 y5 y4 y3 y2 y0 a0 a2 a1 y1 figure 9. analog multiplexer circuitry
r7 can be as large as 0.082 x 1.01 = 0.0828 , yield- ing a minimum peak current limit of 80mv / 0.0828 = 0.966a. use the spreadsheet in listings 1 and 2 to calculate the power available at 3out as a function of the current- sense resistor choice. listing 1. spreadsheet for calculating 3out current capability parameter min max u n i t s (cell a1) (cell b1) (cell c1) current-limit threshold 80 120 mv current sense r7 81 83 m current limit 0.964 1.481 a switching frequency 270 340 khz switching period 2.941 3.704 ? t1 primary inductance 16 24 ? 3out regulation point 3.170 3.430 v batt input range 5.000 17.500 v (cell a10) current limit 0.964 a switching period 3.704 ? t1 primary inductance 16 ? 3out 3.430 batt 17.500 vhi load current 60 ma t1 turns ratio 3.5 t1 coupling loss 80 % (cell a20) t1 ripple current 0.638 a t1 continuous current 0.325 a 3out current, no vhi load 0.645 a vhi load power 0.926 w 3out guaranteed current 0.307 a (cell a26) (cell b26) (cell c26) listing 2. calculating 3out current-capability formulas b4: +b2/c3 c4: +c2/b3 b6: 1/c5*1000 c6: 1/b5*1000 b12: +b4 c13: +c6 b14: +b7 c15: +c8 c16: +c9 c21: @min(+c15/c16*c13*(c16-c15)/b14,b12) c22: +b12-c21 c23: @if(c22=0,0.5*(b14/1000000)*c21^2*1000000/ c13/c15,c22+c21/2) c24: +c15*(c18+1)*c17/1000 c25: +c23-c24/(c19/100)/c15 r7 must have as little series inductance as possible and be as physically small as possible. 3out and cs3 need to kelvin sense r7. a pair of traces running in parallel should leave 3out and cs3 and diverge only when they meet r7. minimize the distance between r7 and the positive terminal of c6. power mosfets m1 and m2 must be logic level, low r ds(on) , n-channel power mosfets. m1? drain should be as close as possible to c15? positive terminal and m2? source should be as close as possible to c15? ground con- nection point. transformer t1 t1? primary inductance must be between 10? and 100?. the peak current allowed through the primary with the secondary open circuited must be greater than the worst-case peak current set by r7. t1? turns ratio (number of turns on secondary / number of turns on pri- mary) should be 3.5. if vhi rises up to 20v when 3out is loaded in operate mode, t1 may have too much interwinding capacitance. minimize interwinding capacitance to prevent energy waste in the vhi clamp (which clamps vhi to 19v to protect the max781). __________applications information design example table 7 shows the targets for a typical design require- ment. since both pcmcia slots will not be pro- grammed at the same time, vppa and vppb will never be at +12v at the same time; thus the worst case for power consumption is when both 3.3v and vppa or vppb is fully loaded. total power consumption = (max 3out voltage) x (max 3out load current) + (vhi voltage) x (max vpp or load current) / (transformer efficiency). max781 pda/hand-held computer power controller ______________________________________________________________________________________ 17
max781 vppa and vppb are linear regulated from vhi, so the power consumed by loads on vppa or vppb equals the vhi voltage times the load current. barring a schottky diode drop, vhi equals the 3out voltage x (1 + turns ratio). with the specifications of table 7 and an 80% transformer efficiency, the total power con- sumption works out to 2.037w; thus the average cur- rent through the primary of t1 is 594ma. the peak current through the primary of t1 will depend on the minimum primary inductance. as a rule of thumb, the peak current will be about 1.5 times the average cur- rent. for an average current of 594ma, the peak cur- rent would be about 900ma. to achieve a 900ma peak current, select r7 to be 80mv / 900ma = 0.088 . the closest comercially available value would be 0.082 ?%. the spreadsheet in listing 1 calculates how high a guaranteed output current can be, given commercial- ly available component values, and taking component tolerances into account. table 8 shows the electrical specifications for a trans- former that meets the requirements of listing 1. power mosfets m1 and m2 should have an on-resis- tance at logic-level gate drive (r ds(on) at v gs = 4.5v) of the same order as t1? primary dc resistance. the siliconix si9955dy dual n-channel mosfet satisfies this requirement with a 0.2 maximum on-resistance per device. table 9 lists the bill of materials for an example circuit that fulfills the requirements of table 7. driving a ccfl backlight royer oscillator the digitally adjustable current from the battery charger can be used to drive a royer oscillator. the royer oscillator is a resonant circuit fed by a constant current. the root mean square current out of the secondary winding of the royer transformer is proportional to the current fed into the center tap of the royer transformer. figure 10 shows the application circuit. the diode from vchg to batt keeps batt from dropping too far below 5out, which causes excess supply current. figure 11 shows how the programmed current corre- sponds to the ccfl root mean square tube current. the npn transistor connected to comp and the zener diode protects the transformer from an open-tube con- dition by shutting off the si9953dy if pin 2 of the ctx110606 exceeds 0.6v + 10v + 0.6v. this limits the voltage on the secondary to 11.2 x 171 x 2 = 3830.4v peak-to-peak = 1354v rms , which is well within the ctx110606 maximum secondary voltage specification of 2010v rms . pda/hand-held computer power controller 18 ______________________________________________________________________________________ table 7. specifications for a typical design table 8. dale electronics m/n lpe-6562-a070 specifications designation 5 nicd cells input power 15v dc adapter parameter 3.3v output current min charge current digitally programmable 5 vppa output current +12v output when programming flash memory in slot a 300 0 60 units v ma a ma max 17.5 1 vppb output current +12v output when programming flash memory in slot a 60 ma typ primary inductance 20 parameter primary continuous dc current 2.6 secondary dc resistance primary dc resistance max 24 0.51 0.075 a units ? min 16 leakage inductance (at 0.1v rms , 100khz) ? 0.03 turns ratio (secondary/primary) 3.5
max781 pda/hand-held computer power controller ______________________________________________________________________________________ 19 table 9. design example bill of materials table 10. component suppliers (603) 224-1430 (603) 224-1961 sprague (213) 772-9028 81-3-3494-7414 (805) 867-2698 (605) 665-1627 (408) 970-3950 (407) 241-9339 (516) 435-1824 fax (213) 772-2000 irc japan 81-3-3494-7411 usa (805) 867-2555 nihon rep: quantum marketing (605) 665-9301 dale (800) 554-5565 supplier siliconix (407) 241-7876 coiltronics (516) 435-1110 central semiconductor phone part no. t1 m/n lpe-6562-a070 l1 cdr125-470 symbol m1, m2 si9955dy m3 si9953dy r1 r4 r7 r8 c1 c2 c3 c5 c6 195d127x06r3r2t c7 c8 c9 c10 195d226x0025r2t c11 c12 c14 195d226x0025r2t d1 cmpd4150 d2 ec10qs03 d3 ec15qs03 d5 ec10qs03 d6 ec10qs05 d7 cmpd4150 manufacturer dale sumida siliconix siliconix irc irc sprague sprague sprague central nihon nihon nihon nihon central transformer 47?, 1.5a idc inductor n-channel mosfets p-channel mosfet 100k , ?0% resistor 0.2 , ?% resistor 0.082 , ?% resistor 10k , ?% resistor 0.1?, 20v capacitor 0.33?, 6v capacitor 1?, 6v capacitor 0.01?, 6v capacitor 120?, 6.3v capacitor, 0.09 esr at 100khz 0.1?, 10v capacitor 1?, 16v capacitor 1?, 16v capacitor 22?, 25v capacitor 2.2?, 25v capacitor 1?, 6v capacitor 22?, 25v capacitor 20v 1n4150 type diode 20v schottky diode 20v schottky diode 20v schottky diode 50v schottky diode 20v 1n4150 type diode description (516) 864-7630 061-627-5467 usa (516) 543-7100 uk 061-627-4963 zetex (708) 956-0702 0621 403538 (914) 347-7230 (708) 956-0666 sumida germany 0621-408012 usa (914) 347-2474 wilhelm westerman rep: inter-technical group
max781 pda/hand-held computer power controller 20 ______________________________________________________________________________________ max781 batt vchg comp cm = central semiconductor note: see table 10 for component supplier information. ct = coiltronics mk = wilhelm westermann fm = zetex dchg agnd csbat 0.33 m f 0.1 m f cmpd4448 10k si9953dy m1 drain ec10qs02l cmpt3904 2 22 m f 20v 10k cmpz5240b cmpd4448 cmpd4448 ctx150-4 ccfl 15pf 2kv 10 1 fmmt619 mks01-smd fmmt619 2345 ctx110606 710 w 0.47 w ccfl 0.1 m f eq = nihon inter electric corp. figure 10. digitally adjustable ccfl backlight circuit
interfacing the max781 to an ibm compatible pc figure 1 shows the max781 typical operating circuit. on power-up, with 4.8v < batt < 18v and ce = sclk = din = 0v, the max781 is in low-power mode. 3out outputs +3.3v linear regulated from batt, and ref outputs +2.5v. int should output a 3.3v logic high. neither dhi nor dlo should be switching. serial data must be sent to the max781 in order to change modes. the parallel printer interface on a personal computer can be used to send serial control data to the max781. listing 3 shows a simple microsoft quick basic pro- gram for communicating with the max781 over the lpt1 parallel interface port. max781 pda/hand-held computer power controller ______________________________________________________________________________________ 21
max781 pda/hand-held computer power controller 22 ______________________________________________________________________________________ listing 3. max781 control program in qbasic
max781 pda/hand-held computer power controller ______________________________________________________________________________________ 23 ___________________chip topography __________________pin configuration aout vppa vhi vppb agnd sync ce sclk dout din int gd5 gd3 gd1 auxin gd4 gd2 shdn temp fast dchg dlo csbat comp pgnd bst 5out 0.219" (5.563mm) 0.152" (3.861mm) ref uvlo vchg batt ss cs 3out lx dhi transistor count: 2661 substrate connected to agnd. 36 35 34 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 gd1 shdn auxin temp aout ref dhi uvlo vchg batt ss cs 3out lx int din dout sclk ce sync agnd vppb vhi vppa gd5 gd4 gd3 gd2 ssop top view max781 22 21 20 19 15 16 17 18 dchg bst dlo pgnd 5out csbat comp fast
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 24 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1994 maxim integrated products printed usa is a registered trademark of maxim integrated products. max781 pda/hand-held computer power controller maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 24 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1994 maxim integrated products printed usa is a registered trademark of maxim integrated products. ________________________________________________________package information l dim a a1 b c d e e h l a min 0.094 0.004 0.011 0.009 0.604 0.292 0.398 0.020 0? max 0.104 0.011 0.017 0.012 0.610 0.298 0.416 0.035 8? min 2.39 0.10 0.30 0.23 15.34 7.42 10.10 0.51 0? max 2.64 0.28 0.44 0.32 15.49 7.57 10.57 0.89 8? inches millimeters a 36-pin plastic shrink small-outline package h e d a a1 c 0.127mm 0.004in. b 0.80 bsc 0.032 bsc 21-0032a e

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